Martin Deneroff
Consultant

Martin Deneroff is an independent consultant and most recently was the head of the Engineering subgroup at D. E. Shaw Research (DESRES). With over thirty years of experience in the electronics industry, he is an expert in computer system architecture and development. Prior to joining DESRES, Mr. Deneroff served as vice president of server and platform engineering at SGI. He also served as the architect for concurrent computer micro 5, as well as the SGI challenge and origin servers. In 2003, Mr. Deneroff was appointed to the high-end computing technology task force, which was created to develop strategies to promote U.S. competitiveness in the global computer market. Mr. Deneroff received a master’s in computer science from Monmouth University, West Branch, N.J., and a bachelor’s in electrical engineering from Massachusetts Institute of Technology (MIT), Cambridge, Mass. In his spare time, Marty enjoys traveling and spending time with his family.

Jack Harding
Chairman, President & CEO, eSilicon Corporation

Jack Harding is responsible for eSilicon's overall leadership, strategy and management. Mr. Harding brings more than 25 years of management experience in the semiconductor industry, spanning the EDA and IC sectors. Prior to co-founding eSilicon in 2000 Harding was the President and CEO of Cadence Designs Systems. During his tenure at Cadence the company was the world's largest supplier of electronics design software and provided the greatest shareholder value in the history of the company. Mr. Harding entered Cadence upon the acquisition of Copper & Chyan Technology (CCT), where he served as the President and CEO, and was responsible for leading the company to an IPO. Prior to CCT Mr. Harding served as the Executive Vice President of Zycad Corporation. Harding began his career with distinction at IBM.

In 2007, the industry elected Mr. Harding for a 3 year-term to the Board of Directors of the Global Semiconductor Alliance (GSA). Mr. Harding has been a finalist for the Ernst & Young Silicon Valley Entrepreneur of the Year Award and the Electronics Executive of the Year ACE Award. He is a frequent international speaker on the topics of innovation, entrepreneurship and semiconductor trends and policies. Harding holds a B.A. from Drew University in Chemistry and Economics and attended the Stern School of Business at New York University.

Colin Harris
Chief Operating Officer, PMC-Sierra

Colin Harris is responsible for all aspects of worldwide manufacturing, including supplier relationships, product testing and assembly. Mr. Harris also oversees quality and reliability, product engineering, information technology and design services. Previously, he was vice president and general manager of the communication products division. Prior to that, he held the position of vice president of IC technology and was in charge of developing the company's computer-aided design, physical design, and quality organizations into Best-In-Class groups—delivering semiconductor solutions. Mr. Harris joined PMC-Sierra (formerly a division of MPR Teltech) as operations manager in 1989. In 1992, he was promoted to director of operations and subsequently director of quality assurance. Mr. Harris began his career as a product engineer in wafer operations at Mitel Semiconductor in 1980 and went on to hold several engineering positions, including manager of IC Design. Mr. Harris is a member of the Global Semiconductor Alliance Board of Directors.

Riko Radojcic
Principal Engineer & Manager, Qualcomm

Riko Radojcic is a leader of Design-for-Technology initiatives at Qualcomm CDMA Technologies—addressing design for 3D integration, manufacturability, and variability methodologies at polygon, circuit, logic and system design levels. Mr. Radojcic has more than twenty-five year’s experience in the semiconductor industry, specializing in the integration of process, design and EDA considerations, and design-for-Si solutions. Before joining Qualcomm, he was a consultant to semiconductor and EDA companies, providing engineering and business development services focused on process-design integration. In addition to this role, Mr. Radojcic was also a director of business development and marketing for DFM solutions at PDF Solutions, as well as a business manager and architect with Tality and Cadence, specializing in design technology integration and process characterization and modeling. Mr. Radojcic has held a series of managerial and engineering positions with Unisys and Burroughs, in device engineering, failure analyses and reliability engineering areas. He began his career as a process engineer with Ferranti Electronics, UK. Mr. Radojcic received his bachelor’s and PhD degrees from University of Salford, UK.

Jean-Pierre Geronimi
CAD Director, STMicroelectronics

Jean-Pierre Geronimi is CAD director at STMicroelectronics. Mr. Geronimi graduated from INPG Grenoble in electrical engineering and computer science. He has more than 20 years of experience in design automation and VLSI implementation - addressing digital, analog and system-in-package CAD flows, physical design kits, CMOS libraries, design for manufacturing, variability and SOC physical implementation. As of 2002, his focus has been on advanced CMOS process introductions and the link between process and design.